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Job Details

FPGA RTL Design

Chennai
Permanent
10 days ago
₹750

SIVALLEY

Semiconductors

2018-05-28 16:35:06

₹100000

4-10 Yrs

Chennai

Job Description

Need min 4+yrs of Exp in FPGA RTL Design using Verilog/VHDL.

·         Should have good knowledge of Design concepts.

·         Very good in RTL Coding, Timing analysis.

·         Should have worked on Altera/Xilinx tools

·         Expertise in VHDL coding for FPGA / CPLD

·         Should have experience in state machines, memory read/write and clock generation

·         Should able to understand the existing code and need to modify the code if bugs are found

·         Experience in Altera Quartus 2 development environment

·         Experience in Lattice diamond development environment

·         Should have worked on Lattice MACHXO, ASC (Power sequencing chip), SPI flash devices (where backup / fallback image stored)

·         Should have worked on Altera Cyclone V(five) FPGA devices

·         Experience in RTL coding using Verilog, System Verilog and VHDL

·         Experience with FPGA interface function and logic; high speed SERDES, parallel bus interfaces, serial bus interfaces.

·         Experience in logic synthesis and STA analysis

·         Be familiar with running test cases and debugging block design in a Specman based environment

·         Be good at English, reading, writing, speaking and listening.

·         Good sense of co-working with team members under Clear Case like source control environments is a plus.

·         Linux environment working capable is a plus; knowledge of script/Shell is a plus.

Preferred Skills

  • FPGA RTL Design,Verilog/VHDL,Test Cases,Debugging,Team Members,Clear Case,Source Control,Linux Environment,Shell,Listening

Required Skills

  • Altera,VHDL Coding,FPGA,Altera Quartus,Development Environment,Lattice,Cyclone,RTL Coding,Verilog,VHDL,Logic Synthesis,Analysis

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