SIVALLEY
Semiconductors
2018-05-28 16:37:32
₹200000
3-7 Yrs
Bengaluru
DFT Engineers (3+ DFt experience) : Either or all of the below · Experience in the block/partition level implementation of the Scan-insertion and verification/simulation for Stuck-at, At-speed patterns. · Experience in the block/partition level implementation of the MBIST using standard tool flows, Tessent MBIST preferred. · Full-chip level BSCAN implementation understanding, integration with RTL-glue for different test-modes, Muxing etc. · SCAN & MBIST verification/simulation and pattern failure debug from tester.
Refer Your Friend
HIreXtra then contact your Friend / colleague/Co Worker
If your Friend Got job Offer
After 90 Days of his Stay, We process your reference reward
HireXtra will contact your Friend